Title page for ETD etd-01122006-165916


Type of Document Master's Thesis
Author Wang, Lei
Author's Email Address lewang1@vt.edu
URN etd-01122006-165916
Title Printed Circuit Board Design for Frequency Disturbance Recorder
Degree Master of Science
Department Electrical and Computer Engineering
Advisory Committee
Advisor Name Title
Liu, Yilu Committee Chair
Centeno, Virgilio A. Committee Member
Conners, Richard W. Committee Member
Keywords
  • MPC555
  • Frequency Monitoring Network (FNET)
  • Printed Circuit Board (PCB)
  • Hardware interface
  • Power system monitoring
  • Frequency Disturbance Recorder (FDR)
Date of Defense 2005-12-12
Availability unrestricted
Abstract

The FDR (Frequency Disturbance Recorder) is a data acquisition device for the power system. The device is portable and can be used with any residential wall outlet for frequency data collection. Furthermore, the FDR transmits calculated frequency data to the web for access by authorized users via Ethernet connection. As a result, Virginia Tech implemented Frequency Monitoring Network (FNET) with these FDR devices. FNET is a collection of identical FDRs placed in different measurement sites to allow for data integration and comparison. Frequency is an important factor for power system control and stabilization. With funding and support provided by ABB, TVA and NSF the FDRs are placed strategically all over the United States for frequency analysis, power system protection and monitoring.

The purpose of this study is to refine the current FDR hardware design and establish a new design that will physically fit all the components on one Printed Circuit Board (PCB). At the same time, the software that is to be implemented on the new board is to be kept similar if not the same as that of the current design. The current FDR uses the Axiom CME555 development board and it is interfaced to the external devices through its communication ports. Even through the CME555 board is able to meet the demands of the basic FDR operations, there are still several problems associated with this design. This paper will address some of those hardware problems, as well as propose a new board design that is specifically aimed for operations of FDR.

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