Title page for ETD etd-01192008-135017


Type of Document Dissertation
Author Thirugnanam, Rajesh
URN etd-01192008-135017
Title Power Line Communications over Power Distribution Networks of Microprocessors - Feasibility Study, Channel Modeling, and a Circuit Design Approach
Degree PhD
Department Electrical and Computer Engineering
Advisory Committee
Advisor Name Title
Ha, Dong Sam Committee Chair
Armstrong, James R. Committee Member
Brown, Ezra B. Committee Member
Reed, Jeffrey Hugh Committee Member
Tront, Joseph G. Committee Member
Keywords
  • Ultra Wideband
  • Microprocessor
  • Power Distribution Network
  • Power Line Communications
Date of Defense 2008-01-14
Availability unrestricted
Abstract
Power line communications (PLC) has been considered by utility companies for over a half century and for home networking in recent years. However, PLC at the IC level, or even at the PCB level, has not been investigated outside Dr. Ha’s research group. This thesis investigates the feasibility of PLC over power distribution networks (PDNs) of advanced microprocessors. A PDN in an integrated circuit (IC) is ubiquitous as seen by the internal logic, i.e., a power line is accessible to any internal node. This suggests the possibility of monitoring or controlling the logic value of any internal node through a power line by attaching a simple sensing/control circuit to the node. Routing the data through a power line avoids the necessity of preplanning the routing of a data path between the node and an external data pin. PLC over microprocessor PDNs also provide a viable means for ‘run-time testing’ as well as for monitoring the so called ‘large time-constant errors’ resulting from aging and temperature variations.

In this thesis, we considered impulse-based ultra wideband (I-UWB) communication technology for PLC over PDNs of microprocessors. I-UWB has several advantages for PLC over PDNs due to its robustness to multipath effects, simple hardware for transmission and reception of pulses and, more importantly, reduced interference to the normal operation of microprocessors. A microprocessor PDN is heavily decoupled to damp the resonances in the power supply impedance as well as to reduce the slew rate of current variations by locally supplying (sinking) currents to (from) the switching nodes. Consequently, a PDN behaves like a bulky lowpass filter for high frequency signals. However, the inductance component of decoupling capacitors becomes more significant beyond the self resonant frequency (SRF) of the capacitors. So, a PDN becomes essentially a distributed circuit beyond the SRF and is no longer a lowpass filter. Indeed, high frequency PDN models developed earlier at Dr. Ha’s group show that there exist multiple frequency bands where high frequency signals can propagate through the PDN with relatively low attenuation [3] [4].

The major contributions of our research lie in three areas. First, we verified existence of passbands on PDN’s transfer characteristics through measurements. We carried out high frequency measurements on the PDN of Intel’s 65 nm Pentium processor and 45 nm Core 2 Duo processor. We measured PDN transfer characteristics up to several GHz from a core power pin on a tester board to an on-chip power node for both active and cold microprocessor dies. The measurements show the existence of narrow, sporadic and migratory passbands i.e. location of passbands change from one generation of processor to the next. The migratory nature of passbands requires the I-UWB receiver and a transmitter to cover a wide range of frequencies rather than a specific passband. Second, we have developed a PDN communication channel model for system level study. To develop the channel model, we also performed noise measurements on Intel microprocessors. The link budget was calculated based on the channel model and appropriate modulation schemes were suggested through the system level study. Third, we investigated design of an I-UWB receiver and a transmitter, which cover a wide bandwidth. The proposed receiver and transmitter designs were evaluated through simulations in TSMC 0.18 μm CMOS process. Our simulation indicates that the PLC over a PDN is feasible with a relatively simple digital-process friendly I-UWB receiver and a transmitter.

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