| Type of Document |
Master's Thesis |
| Author |
Bowen, John Kipp
|
| Author's Email Address |
jobowen2@vt.edu |
| URN |
etd-01312008-141152 |
| Title |
Dynamic Module Library Generation for FPGA-based Run-Time Reconfigurable Systems |
| Degree |
Master of Science |
| Department |
Electrical and Computer Engineering |
| Advisory Committee |
| Advisor Name |
Title |
| Patterson, Cameron D. |
Committee Chair |
| Jones, Mark T. |
Committee Member |
| Martin, Thomas L. |
Committee Member |
|
| Keywords |
- Partial Reconfiguration
- FPGA
- Run-time Reconfiguration
- Module Library
|
| Date of Defense |
2008-01-18 |
| Availability |
unrestricted |
Abstract
Modern Field Programmable Gate Arrays (FPGAs) can implement entire run-time reconfigurable systems using partial reconfiguration. Module-based run-time reconfiguration permits the construction of custom applications at run-time using pre-compiled Intellectual Property (IP) from a module library. The need for both flexible module placement and custom inter-module communication is mostly ignored by existing modular run-time reconfiguration approaches and few existing tool flows for module generation address the need for automation. This thesis introduces an automated compile-time tool flow for generating dynamic modules that allow flexible run-time placement and communication synthesis.
|
| Files |
| Filename |
Size |
Approximate Download Time
(Hours:Minutes:Seconds)
|
| 28.8 Modem |
56K Modem |
ISDN (64 Kb) |
ISDN (128 Kb) |
Higher-speed Access |
| |
JohnKippBowen_thesis2.pdf |
1.11 Mb |
00:05:09 |
00:02:39 |
00:02:19 |
00:01:09 |
00:00:05 |
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