Title page for ETD etd-02172005-001304


Type of Document Dissertation
Author Deng, Haifei
URN etd-02172005-001304
Title Modeling and Design of a Monolithic High Frequency Synchronous Buck with Fast Transient Response
Degree PhD
Department Electrical and Computer Engineering
Advisory Committee
Advisor Name Title
Huang, Alex Q. Committee Co-Chair
Thorp, James S. Committee Co-Chair
Chen, Dan Y. Committee Member
Guido, Louis J. Committee Member
Ha, Dong Sam Committee Member
Lai, Jason Committee Member
Keywords
  • high frequency
  • switching regulator
  • fast transient response
  • Monolithic integration
Date of Defense 2005-02-02
Availability unrestricted
Abstract
With the electronic equipments becoming more and more complicated, the requirements for the power management are more and more strict. Efficient performance, high functionality, small profile, fast transient and low cost are the most wanted features for modern power management ICs, especially for mobile power. In order to reduce profile, the number of external components should be as small as possible, which means that compensator, ramp compensation, current sensor, driver and even power devices should be all implemented on a single chip, i.e. monolithic integration. Comparing with discrete switching DC-DC converter, monolithic integration brings a number of benefits and new design challenges. Besides monolithic integration, high switching frequency is another trend for power management ICs due to its higher bandwidth and the ability to further reduce external passive component size. Comparing with low frequency counterparts, high frequency switching converter design is more difficult in terms of the stability modeling, high switching loss and difficult current sensing etc. The objective of this dissertation is to study the design issues for monolithic integration of high frequency switching DC-DC converter. For this purpose, a high frequency, wide input range monolithic buck converter ASIC with fast transient response is designed based on advanced trench BCD technology.

Stability is the fundamental requirement in designing switching converter ASIC. Achieving this requires an accurate loop gain design, especially for monolithically integrated high frequency switching converter since compensator is fixed on silicon and loop delay is comparable with switching cycle. Since DC-DC switching converters are time-varying system, traditional small signal analysis in SPICE cannot be directly used to simulate the loop gain of this kind of system. A periodic small signal analysis based method is proposed to analyze and simulate DC-DC switching converter inside a SPICE like simulator without the need for averaging. This general method is suitable for any switching regulators. The results are accurate comparing with average modeling and experiment results even at high frequency part. A general procedure to design loop gain is proposed.

Several novel design concepts are proposed for monolithic integration of high frequency switching DC-DC converter; a novel control scheme-Cotangent Control (Ctg control) is proposed for fast transient response; In order to realize on-chip implementation of the compensator, especially for low frequency zero, active feedback compensator is developed and a general design procedure is proposed. Adaptive compensation concept is proposed to stabilize the whole system for a wide application range. Multi-stage driver and multi-section device concepts are investigated for high efficiency and low noise power stage design. And finally, a new noise insensitive lossless RC sensor is proposed for high speed current sensing.

At the end of this dissertation, the test results of the fabricated chip are presented to verify the correctness of these design concepts.

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