Title page for ETD etd-03232001-044800


Type of Document Dissertation
Author Zhang, Jindong
Author's Email Address jindong@vt.edu
URN etd-03232001-044800
Title Advanced Integrated Single-Stage Power Factor Correction Techniques
Degree PhD
Department Electrical and Computer Engineering
Advisory Committee
Advisor Name Title
Lee, Fred C. Committee Chair
Chen, Dan Y. Committee Member
Jovanovic, Milan M. Committee Member
Lai, Jason Committee Member
Liu, Yilu Committee Member
Lu, Guo-Quan Committee Member
Keywords
  • single-stage power factor correction
Date of Defense 2001-03-15
Availability unrestricted
Abstract
This dissertation presents the in-depth study and innovative solutions of the advanced integrated single-stage power-factor-correction (S2PFC) techniques, which target at the low- to medium-level power supplies, for wide range of applications, from power adapters and computers to various communication equipment.

To limit the undesirable power converter input-current-harmonic’s impact on the power line and other electronics equipment, stringent current harmonic regulations such as IEC 61000-3-2 have already been enforced. The S2PFC techniques have been proposed and intensively studied, in order to comply these regulations with minimal additional component count and cost.

This dissertation provides a systematic study of the S2PFC input-current-shaping (ICS) mechanism, circuit topology generalization and variation, bulk capacitor voltage stress and switch current stress, converter design and optimization, and evaluation of the state-of-the-art S2PFC techniques with universal-line input.

Besides, this presentation also presents the development of novel S2PFC techniques with a voltage-doubler-rectifier front end to both improve the performance and reduce the cost of S2PFC converters for (international voltage range) universal-line applications. The calculation and experimental results show that the proposed techniques offer a more cost-effective and efficient solution than industries’ current practice, with universal-line input and converter power level up to 600 W. Finally, further improved technique is also presented with reduced filter inductor size and increased power density.

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  Abstract.pdf 48.27 Kb 00:00:13 00:00:06 00:00:06 00:00:03 < 00:00:01
  acknowledgment.pdf 65.22 Kb 00:00:18 00:00:09 00:00:08 00:00:04 < 00:00:01
  chapter1.pdf 576.72 Kb 00:02:40 00:01:22 00:01:12 00:00:36 00:00:03
  chapter2.pdf 764.35 Kb 00:03:32 00:01:49 00:01:35 00:00:47 00:00:04
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  chapter4.pdf 2.75 Mb 00:12:45 00:06:33 00:05:44 00:02:52 00:00:14
  chapter5.pdf 2.08 Mb 00:09:37 00:04:57 00:04:20 00:02:10 00:00:11
  chapter6.pdf 1.77 Mb 00:08:12 00:04:13 00:03:41 00:01:50 00:00:09
  chapter7.pdf 714.34 Kb 00:03:18 00:01:42 00:01:29 00:00:44 00:00:03
  chapter8.pdf 57.88 Kb 00:00:16 00:00:08 00:00:07 00:00:03 < 00:00:01
  Cover-VT.PDF 8.36 Kb 00:00:02 00:00:01 00:00:01 < 00:00:01 < 00:00:01
  List-of-figures.pdf 136.02 Kb 00:00:37 00:00:19 00:00:17 00:00:08 < 00:00:01
  Reference.pdf 93.47 Kb 00:00:25 00:00:13 00:00:11 00:00:05 < 00:00:01
  Table-of-contents.pdf 84.19 Kb 00:00:23 00:00:12 00:00:10 00:00:05 < 00:00:01
  vita.pdf 40.70 Kb 00:00:11 00:00:05 00:00:05 00:00:02 < 00:00:01

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