Arguably, from the programmer's perspective, the programming model is the most
important characteristic of any computer system. Perhaps this explains why,
after many decades of research, architects and programmers alike continue to
debate the appropriate programming model for parallel computers. Though
thousands of programming models have been developed, standards such as PVM and
MPI have made send-and-receive based message-passing the most popular
programming model for distributed memory architectures. This thesis explores
modifying the Single-Chip Message-Passing (SCMP) architecture to more
efficiently support send-and-receive based message-passing. The proposed system
is compared, for performance and programmability, to the active messaging
programming model currently used by SCMP.
SCMP offers a unique platform for send-and-receive based message-passing. The
SCMP design incorporates multiple multi-threaded processors, memory, and a
network onto a single chip. This integration reduces the penalties of thread
switching, memory access, and inter-process communication typically seen on
more traditional distributed memory parallel machines. The mechanisms proposed
in this thesis to support send-and-receive based message-passing on SCMP
attempt to preserve and exploit these features as much as possible.
