

Type of Document Master's Thesis Author Shrivastava, Vikram M URN etd-05022009-040536 Title Mapping conceptual graphs to primitive VHDL processes Degree Master of Science Department Electrical Engineering Advisory Committee
Advisor Name Title No Advisors Found Keywords
- Mappings (Mathematics)
Date of Defense 1994-00-00 Availability restricted Abstract Files
Filename Size Approximate Download Time (Hours:Minutes:Seconds)
28.8 Modem 56K Modem ISDN (64 Kb) ISDN (128 Kb) Higher-speed Access LD5655.V855_1994.S561.pdf 3.50 Mb 00:16:12 00:08:19 00:07:17 00:03:38 00:00:18 next to an author's name indicates that all files or directories associated with their ETD are accessible from the Virginia Tech campus network only.
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