Title page for ETD etd-05042011-190721


Type of Document Master's Thesis
Author Fayez, Almohanad Samir
Author's Email Address afayez@vt.edu
URN etd-05042011-190721
Title Designing a Software Defined Radio to Run on a Heterogeneous Processor
Degree Master of Science
Department Electrical and Computer Engineering
Advisory Committee
Advisor Name Title
Bostian, Charles W. Committee Chair
Midkiff, Scott F. Committee Member
Patterson, Cameron D. Committee Member
Keywords
  • DSP
  • Cognitive Radio
  • Software Defined Radio
  • OMAP
  • Heterogeneous Processors
Date of Defense 2011-04-25
Availability unrestricted
Abstract
Software Defined Radios (SDRs) are radio implementations in software versus the classic method of using discrete electronics. Considering the various classes of radio applications ranging from mobile-handsets to cellular base-stations, SDRs cover a wide range of power and computational needs. As a result, computing heterogeneity, in terms of Field-Programmable Gate Arrays (FPGAs), Digital Signal Processors (DSPs), and General Purpose Processors (GPPs), is needed to balance the computing and power needs of such radios. Whereas SDR represents radio implementation, Cognitive Radio (CR) represents a layer of intelligence and reasoning that derives reconfiguration of an SDR to suit an application's need. Realizing CR requires a new dimension for radios, dynamically creating new radio implementations during runtime so they can respond to changing channel and/or application needs.

This thesis explores the use of integrated GPP and DSP based processors for realizing SDR and CR applications. With such processors a GPP realizes the mechanism driving radio reconfiguration, and a DSP is used to implement the SDR by performing the signal processing necessary. This thesis discusses issues related to implementing radios in this computing environment and presents a sample solution for integrating both processors to create SDR-based applications.

The thesis presents a sample application running on a Texas Instrument (TI) OMAP3530 processor, utilizing its GPP and DSP cores, on a platform called the Beagleboard. For the application, the Center for Wireless Telecommunications' (CWT) Public Safety Cognitive Radio (PSCR) is ported, and an Android based touch screen interface is used for user interaction. In porting the PSCR to the Beagleboard USB bandwidth and memory access latency issues were the main system bottlenecks. Latency measurements of these interfaces are presented in the thesis to highlight those bottlenecks and can be used to drive GPP/DSP based system design using the Beagleboard.

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