Title page for ETD etd-05102001-170917


Type of Document Master's Thesis
Author Sastry, Kiran Srinivasa
Author's Email Address ksastry@vt.edu
URN etd-05102001-170917
Title An Object Oriented Simulator for Conceptual Graphs
Degree Master of Science
Department Electrical and Computer Engineering
Advisory Committee
Advisor Name Title
Cyre, Walling R. Committee Chair
Broadwater, Robert P. Committee Member
Nance, Richard E. Committee Member
Keywords
  • conceptual graphs
  • simulation
  • conceptual modeling
Date of Defense 2001-05-10
Availability unrestricted
Abstract
This thesis deals with the design and implementation of an object-oriented simulator for conceptual graphs. Conceptual graphs are a means of representing information and knowledge. In particular, they may be used to represent the behavior of mechanisms. Conceptual graph simulation provides the means for verifying that the conceptual graph model of the system is a proper representation of the mechanism. The motivation for the design of this simulator is to help a conceptual graph model designer overcome the imprecision and ambiguity inherent in the English language. When a person translates an English language specification of a system to a conceptual graph model, the model may be incomplete, owing to semantic gaps in the English language specification.

The simulator attempts to help the designer fill in these gaps by pointing out missing concepts and relations needed to simulate the model. This thesis covers the issues involved in designing such a simulator, and the implementation of the simulator in Java. The working of the simulator is demonstrated by simulating sample conceptual graphs. Also, a set of action procedures, and a small library of device schema graphs are created, so that devices may be effectively modeled.

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