Title page for ETD etd-05172000-10350003


Type of Document Master's Thesis
Author Helo, Felipe
Author's Email Address fhelo@vt.edu
URN etd-05172000-10350003
Title Decision Support System to Predict the Manufacturing Yield of Printed Circuit Board Assembly Lines
Degree Master of Science
Department Industrial and Systems Engineering
Advisory Committee
Advisor Name Title
Ellis, Kimberly P. Committee Co-Chair
Kobza, John E. Committee Co-Chair
Nachlas, Joel A. Committee Member
Keywords
  • Surface Mount
  • Fault Coverage
  • Printed Circuit Board
  • Defect-level
  • Yield
Date of Defense 2000-04-27
Availability unrestricted
Abstract
This research focuses on developing a model to predict the yield of a printed circuit board manufactured on a given assembly line. Based on an extensive literature review as well as discussion with industrial partners, it was determined that there is no tool available for assisting engineers in determining reliable estimates of their production capabilities as they introduce new board designs onto their current production lines. Motivated by this need, a more in-depth study of manufacturing yield as well as the electronic assembly process was undertaken. The relevant literature research was divided into three main fields: process modeling, board design, and PCB testing. The model presented in this research combines elements from process modeling and board design into a single yield model.

An optimization model was formulated to determine the fault probabilities that minimize the difference between actual yield values and predicted yield values. This model determines fault probabilities (per component type) based on past production yields for the different board designs assembled. These probabilities are then used to estimate the yields of future board designs. Two different yield models were tested and their assumptions regarding the nature of the faults were validated. The model that assumes independence between faults provided better yield predictions.

A preliminary case study was performed to compare the performance of the presented model with that of previous models using data available from the literature. The proposed yield model predicts yield within 3% of the actual yield value, outperforming previous regression models that predicted yield within 10%, and artificial neural network models that predicted yield within 5%.

A second case study was performed using data gathered from actual production lines. The proposed yield model continued to provide very good yield predictions. The average difference with respect to the actual yields from this case study ranged between 1.25% and 2.27% for the lines studied. Through sensitivity analysis, it was determined that certain component types have a considerably higher effect on yield than others. Once the proposed yield model is implemented, design suggestions can be made to account for manufacturability issues during the design process.

Files
  Filename       Size       Approximate Download Time (Hours:Minutes:Seconds) 
 
 28.8 Modem   56K Modem   ISDN (64 Kb)   ISDN (128 Kb)   Higher-speed Access 
  ETDfhelo1b.pdf 571.80 Kb 00:02:38 00:01:21 00:01:11 00:00:35 00:00:03

Browse All Available ETDs by ( Author | Department )

dla home
etds imagebase journals news ereserve special collections
virgnia tech home contact dla university libraries

If you have questions or technical problems, please Contact DLA.