Title page for ETD etd-05232009-141216


Type of Document Master's Thesis
Author Dong, Dong
URN etd-05232009-141216
Title Modeling and Control Design of a Bidirectional PWM Converter for Single-phase Energy Systems
Degree Master of Science
Department Electrical and Computer Engineering
Advisory Committee
Advisor Name Title
Boroyevich, Dushan Committee Chair
Burgos, Rolando Committee Member
Wang, Fei Fred Committee Member
Keywords
  • modeling and control
  • modes of operation
  • single-phase PWM converter
Date of Defense 2009-05-06
Availability unrestricted
Abstract
This thesis proposes a complete modeling and control design methodology for a multifunctional single-phase bidirectional PWM converter in renewable energy systems. There is a generic current loop for different modes of operation to ease the transition between different modes, including stand-alone inverter mode, grid-tied inverter mode, grid-tied rectifier mode and grid-tied charger/discharger mode. Under stand-alone mode operation, ac voltage regulation is of importance because of the sensitive loads. In this thesis, different multi-loop-based control schemes are investigated and compared, especially between the load current feedback control, PR control and capacitor current loop control. It shows that PR controller reduces the steady-state error, while load current feedback controller improves the transient response. However, the load current feedback controller and capacitor current loop controller presents unstable outputs under some filter load condition. Single-phase d-q frame control is also studied. In order to ease the implementation effort, an unbalanced d-q frame control is proposed to achieve zero steady-state error voltage regulation without generating β-axis component. Based on the same principle, a d-q frame-based single-phase PLL is also proposed to achieve the fast dynamic response with the zero steady-state error phase tracking.

The entire control system is verified on a modified 7 kW single-phase PWM converter prototype with a simple DSP-based digital implementation. The load step response test is presented under different modes of operation. The controllers for stand-alone mode are also done under no load, 1 kW resistive load, 1kVar capacitive load, and non-linear load conditions verifying that the single-phase d-q achieves 70% steady-state error improvement if taking the normal PID controller as the baseline design. In the end, the proposed PLL is compared with the standard PLL by experiments showing that the steady-state error can be reduced by 80%.

Files
  Filename       Size       Approximate Download Time (Hours:Minutes:Seconds) 
 
 28.8 Modem   56K Modem   ISDN (64 Kb)   ISDN (128 Kb)   Higher-speed Access 
  Dong_Thesis.pdf 6.58 Mb 00:30:28 00:15:40 00:13:42 00:06:51 00:00:35

Browse All Available ETDs by ( Author | Department )

dla home
etds imagebase journals news ereserve special collections
virgnia tech home contact dla university libraries

If you have questions or technical problems, please Contact DLA.