| Type of Document |
Dissertation |
| Author |
Grajales, Liliana
|
| URN |
etd-06062008-155400 |
| Title |
Analysis and design of a 500 kHz series resonant inverter for induction heating applications |
| Degree |
PhD |
| Department |
Electrical Engineering |
| Advisory Committee |
| Advisor Name |
Title |
| Lee, Fred C. |
Committee Chair |
| Borojevich, Dushan |
Committee Member |
| Johnson, Lee W. |
Committee Member |
| Jovanovic, Milan M. |
Committee Member |
| Stephenson, F. William |
Committee Member |
|
| Keywords |
- DC analysis
- induction heating
- series-resonant
- small-signal analysis
|
| Date of Defense |
1995-11-06 |
| Availability |
restricted |
Abstract
The steady state model and analysis of a phase-shift controlled series resonant
inverter (PSC-SRl) is presented. This steady state model includes the evaluation of the
zero-voltage switching (ZVS) condition and the determination of the ZVS operating
region. Based upon this analysis a frequency control strategy that minimizes circulating
energies is proposed. Also, a methodology to design the power stage components, and to
predict the duty ratio and the operating frequency range is presented using a PSC-SRl
design example operating at 500 kHz and 10 kW. In addition, a novel and simple
frequency control circuit that implements the proposed frequency control strategy is
provided. Besides, the analysis of the PSC-SRl complete power stage and two control-loop
system (frequency control and duty ratio control) is given. Furthermore, the small-signal
model and the compensation schemes for each of the control loops is presented.
The analytical predictions are compared with experimental data measured from a 500
kHz, 10 kW laboratory prototype and conclusions are drawn.
|
| Files |
| Filename |
Size |
Approximate Download Time
(Hours:Minutes:Seconds) |
| 28.8 Modem |
56K Modem |
ISDN (64 Kb) |
ISDN (128 Kb) |
Higher-speed Access |
![[VT]](http://scholar.lib.vt.edu/images/ETD-db/restricted.gif) |
LD5655.V856_1995.G735.pdf |
8.55 Mb |
00:39:34 |
00:20:21 |
00:17:48 |
00:08:54 |
00:00:45 |
![[BTD]](http://scholar.lib.vt.edu/images/ETD-db/btd.gif)
next to an author's name indicates that all
files or directories associated with their ETD
are accessible from the Virginia Tech campus network only.
|