Type of Document Master's Thesis Author Venkateshwaran, Anjali URN etd-06102012-040341 Title An experimental investigation of dynamically reconfigurable computer network architectures through simulation Degree Master of Science Department Computer Science Advisory Committee
Advisor Name Title Nance, Richard E. Committee Chair Balci, Osman Committee Member Kafura, Dennis G. Committee Member Keywords
- Computer architecture
Date of Defense 1988-01-04 Availability restricted AbstractThe research described in this thesis is divided conveniently into three components: (1)
the credibility assessment of a simulation model for the investigation of dynamically
reconfigurable computer network architectures, (2) a comparative study of the standardized
time series method of simulation output analysis, and (3) an experimental comparison of the
effects of dynamic reconfigurability on message transmission delays and network throughput.
The credibility assessment relies almost completely on verification procedures applied
to both communicative and program representations of the model. In the absence of an extant
system, validation consists of extensive, program traces to assure that model behavior
matches expectations and reflects no inconsistencies.
Application of a standardized time series technique produces the advantages reported
by other researchers with regard to sampling efficiency (information derived per sample unit)
when dynamic reconfigurability is precluded. The inherent non-stationarity induced by reconfiguration
reveals the sensitivity of standardized time series and the consequent adjustment
to preserve coverage. A compromise between coverage and sampling efficiency prompts the
choice of the batch means method for experimental comparison.
Experimental comparison shows that under high traffic variability reconfigurability
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