| Type of Document |
Master's Thesis |
| Author |
Gregory, Walter Lee
|
| URN |
etd-06122010-020251 |
| Title |
Test scheduling and configuration in a self-repairing computer |
| Degree |
Master of Science |
| Department |
Electrical Engineering |
| Advisory Committee |
| Advisor Name |
Title |
| Thompson, R. A. |
Committee Chair |
| Bostian, Charles W. |
Committee Member |
| Gray, Festus Gail |
Committee Member |
|
| Keywords |
- computational configurations
|
| Date of Defense |
1977-05-15 |
| Availability |
restricted |
Abstract
The structure of cellular arrays and Tessellation Automata are
introduced as a "fabric" for use in the implementation of self-testing
and self-repairing computational configurations. Testing schemes are
suggested for use in the "self-testing" operation of this computer
system. Sequentially propagating tests are examined for both finite and
infinite geometries of cellular arrays. A static parallel testing procedure
is also suggested which offers these advantages: (1) the parallel
testing procedure is transparent to the computer configuration,
(2) very little computational down-time" results from testing, and
(3) the parallel testing procedure does not initiate reconfiguration of
the computational configuration.
|
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| Filename |
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56K Modem |
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ISDN (128 Kb) |
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LD5655.V855_1977.G74.pdf |
3.01 Mb |
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