Title page for ETD etd-07022004-004557


Type of Document Master's Thesis
Author Chinnusamy, Malarvizhi
Author's Email Address malar@vt.edu
URN etd-07022004-004557
Title Data and Processor Mapping Strategies for Dynamically Resizable Parallel Applications
Degree Master of Science
Department Computer Science
Advisory Committee
Advisor Name Title
Ribbens, Calvin J. Committee Chair
Santos, Eunice E. Committee Member
Varadarajan, Srinidhi Committee Member
Keywords
  • Grid Computing
  • Remapping
  • Heterogeneous resources
  • MPI
  • Processor allocation
  • dynamic resizable applications
  • ScaLAPACK
Date of Defense 2004-06-18
Availability unrestricted
Abstract

Due to the unpredictability in job arrival times in clusters and widely varying resource requirements, dynamic scheduling of parallel computing resources is necessary to increase system throughput. Dynamically resizable applications provide the flexibility needed for dynamic scheduling. These applications can expand to take advantage of additional free processors, or to meet a Quality of Service (QoS) deadline, or can shrink to accommodate a high priority application, without getting suspended.

This thesis is part of a larger effort to define a framework for dynamically resizable parallel applications. This framework includes a scheduler that supports resizing applications, an API to enable applications to interact with the scheduler, and libraries that make resizing viable. This thesis focuses on libraries for efficient resizing of parallel applications – efficient in terms of minimizing the cost of data redistribution, choosing and allocating the right set of additional processors, and focusing on the performance of the application after resizing. We explore the tradeoffs between these goals on both homogeneous and heterogeneous clusters. We focus on structured applications that have 2D data arrays distributed across a 2D processor grid.

Our library includes algorithms for processor selection and processor mapping. For homogeneous clusters, processor selection involves selecting the number of processors that needs to be added and processor mapping decides the placement of the new processors in the context of the given topology such that it minimizes the amount of data that is to be redistributed. For heterogeneous clusters, since the processing powers of the processors vary, there is also an additional problem of choosing the right set of processors that needs to be added. We also present results that demonstrate the effectiveness of our approach.

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