Title page for ETD etd-08112004-210027


Type of Document Master's Thesis
Author Poole, Jeffrey Hyatt
Author's Email Address jpoole@vt.edu
URN etd-08112004-210027
Title Implementation of a Hardware-Optimized MPI Library for the SCMP Multiprocessor
Degree Master of Science
Department Electrical and Computer Engineering
Advisory Committee
Advisor Name Title
Baker, James M. Jr. Committee Chair
Mishra, Amitabh Committee Member
Tront, Joseph G. Committee Member
Keywords
  • Message-Passing Systems
  • Single-Chip Systems
  • Parallel Architecture
  • Chip Multiprocessors
  • Message Passing Interface
  • MPI
Date of Defense 2004-07-21
Availability unrestricted
Abstract
As time progresses, computer architects continue to create faster and more complex microprocessors using techniques such as out-of-order execution, branch prediction, dynamic scheduling, and predication. While these techniques enable greater performance, they also increase the complexity and silicon area of the design. This creates larger development and testing times. The shrinking feature sizes associated with newer technology increase wire resistance and signal propagation delays, further complicating large designs. One potential solution is the Single-Chip Message-Passing (SCMP) Parallel Computer, developed at Virginia Tech. SCMP makes use of an architecture where a number of simple processors are tiled across a single chip and connected by a fast interconnection network. The system is designed to take advantage of thread-level parallelism and to keep wire traces short in preparation for even smaller integrated circuit feature sizes.

This thesis presents the implementation of the MPI (Message-Passing Interface) communications library on top of SCMP's hardware communication support. Emphasis is placed on the specific needs of this system with regards to MPI. For example, MPI is designed to operate between heterogeneous systems; however, in the SCMP environment such support is unnecessary and wastes resources. The SCMP network is also designed such that messages can be sent with very low latency, but with cooperative multitasking it is difficult to assure a timely response to messages. Finally, the low-level network primitives have no support for send operations that occur before the receiver is prepared and that functionality is necessary for MPI support.

Files
  Filename       Size       Approximate Download Time (Hours:Minutes:Seconds) 
 
 28.8 Modem   56K Modem   ISDN (64 Kb)   ISDN (128 Kb)   Higher-speed Access 
  PooleThesis.pdf 861.81 Kb 00:03:59 00:02:03 00:01:47 00:00:53 00:00:04

Browse All Available ETDs by ( Author | Department )

dla home
etds imagebase journals news ereserve special collections
virgnia tech home contact dla university libraries

If you have questions or technical problems, please Contact DLA.