Type of Document	Dissertation
Author	Suris Pietri, Jorge Alberto
Author's Email Address	jasuris@vt.edu
URN	etd-08192009-221317
Title	Rapid Radio: Analysis-Based Receiver Deployment
Degree	PhD
Department	Electrical and Computer Engineering
Advisory Committee	Advisor Name Title Athanas, Peter M. Committee Chair Abbott, A. Lynn Committee Member Butt, Ali R. A. Committee Member Patterson, Cameron D. Committee Member Reed, Jeffrey Hugh Committee Member
Keywords	Productivity Rapid Prototyping FPGA Automation Synchronization Signal Classification Synthesis
Date of Defense	2009-08-07
Availability	unrestricted
Abstract A large body of work has been produced in the area of productivity enhancers for the design of both Software-Defined Radio and Field Programmable Gate Arrays systems. These tool are created with the goal of aiding the user in the process of instantiating a design. They do not address, however, a specific use-case in which the user does not know or care about what the design of his system is. In this work, analysis-based design is presented and applied to FPGA-based SDRs. The RapidRadio framework abstracts away much of the knowledge required for analyzing an unknown signal and building an FPGA-based receiver. Resource utilization is traded-off for reduced implementation time and increased flexibility. Automatic modulation classification is done with blind parameter estimation. Unlike other contemporary work, no a priori knowledge about the signal being classified is assumed. This leads to the development of a system that does not depend on perfect synchronization to classify the signal. A new quasi-generic synchronization architecture that allows the synchronization of multiple modulations schemes is presented. The result of the modulation classification is used to automatically create an FPGA-based radio receiver.
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