Type of Document	Master's Thesis
Author	Pan, Bi-Yu
URN	etd-09052009-040449
Title	Hierarchical test generation for VHDL behavioral models
Degree	Master of Science
Department	Electrical Engineering
Advisory Committee	Advisor Name Title No Advisors Found
Keywords	Integrated circuits
Date of Defense	1992-00-00
Availability	restricted
Abstract
Files	Filename       Size       Approximate Download Time (Hours:Minutes:Seconds)     28.8 Modem   56K Modem   ISDN (64 Kb)   ISDN (128 Kb)   Higher-speed Access  LD5655.V855_1992.P36.pdf 2.47 Mb 00:11:27 00:05:53 00:05:09 00:02:34 00:00:13 next to an author's name indicates that all files or directories associated with their ETD are accessible from the Virginia Tech campus network only.

If you have questions or technical problems, please Contact DLA.