Title page for ETD etd-10597-161936


Type of Document Master's Thesis
Author McCulley, Scott L.
Author's Email Address mcculles@grayson.com
URN etd-10597-161936
Title Design and Implementation of a Practical FLEX Paging Decoder
Degree Master of Science
Department Electrical Engineering
Advisory Committee
Advisor Name Title
Rappaport, Theodore S. Committee Chair
Reed, Jeffrey Hugh Committee Member
Woerner, Brian D. Committee Member
Keywords
  • Frequency Shift Keying (FSK)
  • Paging Decoder
  • Bit-Error-Rate (BER) Measurements
  • Bose-Chaudhuri-Hocquenhem (BCH)
  • FLEX
Date of Defense 1997-10-24
Availability unrestricted
Abstract
The Motorola Inc. paging protocol FLEX is discussed. The design and construction of a FLEX paging protocol decoder is discussed in detail. It proposes a decoding solution that includes a radio frequency (RF) receiver and a decoder board. The RF receiver will be briefly discussed.

The decoder design is the main focus of this thesis as it transforms the RF frequency modulated (FM) data from the receiver and converts it to FLEX data words. The decoder is designed to handle bit sampling, bit clock synchronization, FLEX packet detection, and FLEX data word collection. The FLEX data words are then sent by the decoder to an external computer through a serial link for bit processing and storage. A FLEX transmitter will send randomly generated data so that a bit error rate (BER) calculation can be made at a PC. Each receiver'9s noise power and noise bandwidth will be measured so that noise spectral density may be calculated. A complete measurement set-up will be shown on how these noise measurements are made. The BER at a known power level is recorded. This enables Eb/No curves to be generated so that results of the decoding algorithm may be compared. This is performed on two different receivers.

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