| Type of Document |
Master's Thesis |
| Author |
Nakad, Zahi Samir
|
| URN |
etd-11132000-12050007 |
| Title |
High Performance Applications on Reconfigurable Clusters |
| Degree |
Master of Science |
| Department |
Electrical and Computer Engineering |
| Advisory Committee |
| Advisor Name |
Title |
| Mark Jones |
Committee Chair |
| James Armstrong |
Committee Member |
| Peter Athanas |
Committee Member |
|
| Keywords |
- FIR filters
- FPGA
- reconfigurable computing
- constant coefficient multipliers
|
| Date of Defense |
2000-09-20 |
| Availability |
unrestricted |
Abstract
Many problems faced in the engineering world are computationally intensive. Filtering using FIR (Finite Impulse Response) filters is an example to that. This thesis discusses the implementation of a fast, reconfigurable, and scalable FIR (Finite Impulse Response) digital filter. Constant coefficient multipliers and a Fast FIFO implementation are also discussed in connection with the FIR filter. This filter is used in two of its structures: the direct-form and the lattice structure. The thesis describes several configurations that can be created with the different components available and reports the testing results of these configurations.
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| Files |
| Filename |
Size |
Approximate Download Time
(Hours:Minutes:Seconds)
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| 28.8 Modem |
56K Modem |
ISDN (64 Kb) |
ISDN (128 Kb) |
Higher-speed Access |
| |
Thesis_Submission.PDF |
210.75 Kb |
00:00:58 |
00:00:30 |
00:00:26 |
00:00:13 |
00:00:01 |
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