Title page for ETD etd-11212002-145932


Type of Document Dissertation
Author Kim, Song Hun
Author's Email Address shkim@vt.edu
URN etd-11212002-145932
Title Distributed Reconfigurable Simulation for Communication Systems
Degree PhD
Department Electrical and Computer Engineering
Advisory Committee
Advisor Name Title
Tranter, William H. Committee Chair
Athanas, Peter M. Committee Member
Koelling, Charles Patrick Committee Member
Midkiff, Scott F. Committee Member
Reed, Jeffrey Hugh Committee Member
Keywords
  • middleware
  • distributed computing
  • reconfigurable computing
  • simulation
Date of Defense 2002-11-07
Availability unrestricted
Abstract
The simulation of physical-layer communication systems often requires long execution times. This is due to the nature of the Monte Carlo simulation. To obtain a valid result by producing enough errors, the number of bits or symbols being simulated must significantly exceed the inverse of the bit error rate of interest. This often results in hours or even days of execution using a personal computer or a workstation.

Reconfigurable devices can perform certain functions faster than general-purpose processors. In addition, they are more flexible than Application Specific Integrated Circuit (ASIC) devices. This fast yet flexible property of reconfigurable devices can be used for the simulation of communication systems. However, although reconfigurable devices are more flexible than ASIC devices, they are often not compatible with each other. Programs are usually written in hardware description languages such as Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL). A program written for one device often cannot be used for another device because these devices all have different architectures, and programs are architecture-specific.

Distributed computing, which is not a new concept, refers to interconnecting a number of computing elements, often heterogeneous, to perform a given task. By applying distributed computing, reconfigurable devices and digital signal processors can be connected to form a distributed reconfigurable simulator.

In this paper, it is shown that using reconfigurable devices can greatly increase the speed of simulation. A simple physical-layer communication system model has been created using a WildForce board, a reconfigurable device, and the performance is compared to a traditional software simulation of the same system. Using the reconfigurable device, the performance was increased by approximately one hundred times. This demonstrates the possibility of using reconfigurable devices for simulation of physical-layer communication systems.

Also, an middleware architecture for distributed reconfigurable simulation is proposed and implemented. Using the middleware, reconfigurable devices and various computing elements can be integrated. The proposed middleware has several components. The master works as the server for the system. An object is any device that has computing capability. A resource is an algorithm or function implemented for a certain object. An object and its resources are connected to the system through an agent. This middleware system is tested with three different objects and six resources, and the performance is analyzed. The results shows that it is possible to interconnect various objects to perform a distributed simulation using reconfigurable devices. Possible future research to enhance the architecture is also discussed.

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