Type of Document	Master's Thesis
Author	Koe, Wern-Yan
URN	etd-11292012-040100
Title	An investigation of sensitization conditions and test effectiveness for CMOS faults
Degree	Master of Science
Department	Electrical Engineering
Advisory Committee	Advisor Name Title Midkiff, Scott F. Committee Chair Ha, Dong Sam Committee Member Tront, Joseph G. Committee Member
Keywords	Metal oxide semiconductors - Complementary
Date of Defense	1989-11-15
Availability	restricted
Abstract Testing of digital circuits ensures functionality and reliability ofthe circuits. Previous research has addressed the inadequacies of conventional test methods based on line stuck-at faults in testing CMOS circuits and has proposed new test methods. In this research, the effectiveness of propagation delay testing for open and short faults and supply current monitoring for short faults is investigated. Representative circuits are modeled and simulated over a wide range of fault severities. Factors, such as circuit and fault features, that affect test effectiveness are evaluated and analyzed. From the results, general conclusions are drawn and future research is proposed.
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