Title page for ETD etd-12072007-151855

Type of Document

Master's Thesis

Author

Marschner, Alexander R.

Author's Email Address

amarschn@vt.edu

URN

etd-12072007-151855

Title

An FPGA-based Target Acquisition System

Degree

Master of Science

Department

Electrical and Computer Engineering

Advisory Committee

Advisor Name	Title
Athanas, Peter M.	Committee Chair
Jones, Mark T.	Committee Member
Martin, Thomas L.	Committee Member

Keywords

OpenFire
multi-core
soft processor
object tracking
image clipping

Date of Defense

2007-12-03

Availability

unrestricted

Abstract

This work describes the development of an image processing algorithm, the implementation
of that algorithm as both a strictly hardware design and as a multi-core software design,
and the side-by-side comparison of the two implementations. In the course of creating the
multi-core software design, several improvements are made to the OpenFire soft core micro-
processor that is used to create the multi-core network. The hardware and multi-core software
implementations of the image processing algorithm are compared side-by-side in an FPGA-
based test platform. Results show that although the strictly hardware implementation leads
in terms of lower power consumption and very low area consumption, modification of and
programming for the multi-core software implementation is simpler to perform.

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