Title page for ETD etd-2113131549741341

Type of Document

Master's Thesis

Author

Huang, Qihong

URN

etd-2113131549741341

Title

Harmonic Reduction IN a Single-Switch Three-Phase Boost Rectifier With Harmonic-Injected PWM

Degree

Master of Science

Department

Electrical and Computer Engineering

Advisory Committee

Advisor Name	Title
Fred C. Lee	Committee Chair
Dan Y. Chen	none
Milan M. Jovanovic	none

Keywords

power factor correction
switching rectifier
PWM techniques

Date of Defense

1997-02-04

Availability

unrestricted

Abstract

A constant

switching frequency with the sixth-order harmonic

injection PWM concept is established, and a

sixth-order harmonic injection technique is

developed for the harmonic reduction of a

single-switch three-phase boost rectifier. The

approach employs a constant duty cycle with

sixth-order harmonic injection to suppress the

dominant (fifth-order) harmonic in the input

currents. Hence, to meet the THD<10%

requirement, the rectifier voltage gain can be

designed down to 1.45; to meet the IEC

1000-3-2 (A) standard, the output power can be

pushed up to 10 kW for the application with a

3X220 V input and a 800 V output. The results

are verified on a 6-kW prototype. The injection

principle is graphically explained in current

waveforms and mathematically proved. Two

injection methods are proposed to meet either the

THD requirement or the IEC standard. The

injection implementation and design guidelines are

provided. The boost inductor design and EMI

filter design are discussed. An average small-

signal model based on the equivalent multi-module

model is developed and experimentally verified.

The variations of the small-signal model against

load are demonstrated, and the compensator

design is discussed. The results show that at no

load, the dominant pole of the control-to-output

transfer function approaches the origin and causes

more phase delay, making the control design

difficult. To avoid the no load case and to simplify

the control design, a 50-W dummy load (1% of

the full load) is added. Finally, a simple nonlinear

gain control circuit is presented to mitigate the

load effect and reduce the dummy load to 10 W.

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