|Document Type:||Master's Thesis|
|Title:||STUDY AND IMPROVEMENT OF SINGLE-STAGE POWER FACTOR CORRECTION TECHNIQUES|
|Degree:||Master of Science|
|Department:||Electrical and computer engineering|
|Committee Chair:||Fred C. Lee|
|Committee Members:||Dan Y. Chen|
|Keywords:||power factor correction, single-stage|
|Date of defense:||August 6, 1998|
|Availability:||Release the entire work for Virginia Tech access only.
After one year release worldwide only with written permission of the student and the advisory committee chair.
This thesis work focuses on the study and improvement of single-stage power factor correction techniques. The generalized structures of the present pulse-width-modulation (PWM) integrated single-stage power factor correction (PFC) converters are presented. The typical PFC cells in the single-stage PFC converter are identified. After that, the necessary PFC condition is derived and verified to understand the principle of the single-stage PFC converters. As an example, the continuous current mode (CCM) current source single-stage PFC converter is studied. The circuit intuitions and design consideration of this converter are presented. Also, an improved current source single-stage PFC converter with a low-frequency auxiliary switch is proposed to overcome the problem of the previous converter. Experimental verification shows the improvement is effective. To evaluate single-stage PFC technique, a comparison study between the current source single-stage and the boost two-stage PFC converters is done in this thesis. It shows that for universal line application, due to the wide bus-capacitor voltage range, single-stage PFC converters have higher component ratings than two-stage PFC converters. This limits the application of single-stage PFC converter. Therefore, an interesting future work will be how to reduce the bus voltage range of single-stage PFC converters.
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