Scholarly
    Communications Project


Document Type:Master's Thesis
Name:Todd William Goedde
Email address:goeddemc@email.uc.edu
URN:1997/00451
Title:DECODER BOARD HARDWARE/SOFTWARE DEVELOPMENT IN WIRELESS INTERACTIVE VIDEO DATA SERVICE SYSTEM
Degree:Master of Science
Department:Electrical and Computer Engineering
Committee Chair: Nathaniel J. Davis, IV
Chair's email:ndavis@vt.edu
Committee Members:Willard W. Farley
Dennis G. Sweeney
Keywords:IVDS, Spread Spectrum, Radio Frequency
Date of defense:September 18, 1997
Availability:Release the entire work immediately worldwide.

Abstract:

The Interactive Video Data Service (IVDS) system allows consumers to browse the Internet, request information on products or services, make purchases, indicate preferences, and perform other interactive applications. To provide this service, the IVDS system has three subsystems: Consumer Control (CC), Cell Repeater (CR), and Host subsystem.

In the CC subsystem, an IVDS transceiver box is placed near a television set. Once the consumer sends a command to the transceiver box using a standard television/VCR/Cable remote control, the transceiver box receives information embedded in the television audio, and then transmits the information to the CR subsystem as a radio frequency (RF) spread spectrum message.

The CR subsystem decodes the spread spectrum message and forwards it to the Host subsystem for processing. Located in the CR subsystem, a custom designed circuit board, called the decoder board, uses surface mounted components to decode and packetize the spread spectrum message for transfer to the CR main processor.

This paper provides a functional description of the hardware components on the decoder board, and describes the hardware/software developed for interfacing the decoder board to the radio receiver and to the CR main processor. Hardware modifications were needed to correct timing problems between components. Software was developed to initialize the components for downconverting, despreading, and demodulating spread spectrum messages, and to packetize them for transfer to the CR main processor. This paper also discusses the tests used to verify both the performance of the decoder board software and the operation of the hardware components.


List of Attached Files

ABSTRACT.PDF ACKNOWLE.PDF APPENDXA.PDF
APPENDXB.PDF CHAPT5A.PDF CHAPT5B.PDF
CHAPTER1.PDF CHAPTER2.PDF CHAPTER3.PDF
CHAPTER4.PDF CHAPTER6.PDF CHAPTER7.PDF
DEDICATN.PDF LSTFIGUR.PDF LSTTABLE.PDF
REFERENS.PDF TBLECONT.PDF TITLE.PDF
VITA.PDF


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