Scholarly
    Communications Project


Document Type:Master's Thesis
Name:Andreas Indra Gunawan
Email address:gunawan@vt.edu
URN:1998/00648
Title:ModelMaker: A Tool for Rapid Modeling from Device Descriptions
Degree:Master of Science
Department:Electrical and Computer Engineering
Committee Chair: Walling R. Cyre
Chair's email:cyre@vt.edu
Committee Members:J.R. Armstrong
F.G. Gray
Keywords:tool, modelmaker, vhdl, specification
Date of defense:May 20, 1998
Availability:Release the entire work immediately worldwide.

Abstract:

This thesis describes a tool that facilitates rapid modeling of devices from informal documents. The ModelMaker tool facilitates the construction of models by analyzing the source specification document and presenting it based on the modelerís need. ModelMaker analyzes and indexes the source document for the noun phrases and identifiers it contains. When the modeler specifies the name of a pin or device that the modeler is working on, ModelMaker will recover any behavioral or structuralinformation about the particular pin or device. ModelMaker can return this information based on the order of how relevant the information is to the model that the modeler is trying to build. The modeling language that can be used for this tool is VHDL. The initial VHDL model is derived from a block diagram of the source document using a schematic capture tool. This VHDL model can be edited inside ModelMaker to add behavioral code and to insert source document fragments as comments.

List of Attached Files

Thesis.pdf


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